Prof. Alexandres received the M.Sc. and Ph.D. degrees in Telecommunications (1985,1991) both, by Technical University of Madrid. His research is focused on several aspects of Telecommunications, mainly those where the design and test of the physical layer of communications systems as well as hardware modulation, front-end architecture, and algorithms for coding and multiplexing is carried out. He has made several contributions with EUROCHIP and EUROPRACTICE European Programs with several ASICs: DES-Cypher-IC, RISC-IC, Viterbi-IC, MPEG-Coder-IC and others VLSI communications chips using ES2 foundry and Cadence CAD Tools. He has been working last years on the design of telecommunications architectures for Transport Systems and Smart-grids telecom-network developments with several Spanish and European companies.