Dynamic Voltage Restorers (DVRs) are a costeffective solution to protect sensitive loads against voltage sags in medium- and high-power applications because the power required to compensate sags is only a fraction of the load rated power. Also, the energy storage requirements of DVRs can be greatly reduced by using minimum-power compensation of voltage sags. However, this compensation strategy can disturb sensitive loads and tends to saturate the injection transformer unless a slow phase rotation technique is used when a voltage sag is detected. The sag detection needs to be robust, but also fast to provide accurate results so that the DVR can work under all possible situations. This paper proposes and studies in detail a sag-detection algorithm for a DVR that, when designed and implemented carefully, provides excellent performance when the grid voltage contains harmonics and the grid frequency varies. All the algorithms proposed in this paper are tested on a 5 kVA prototype of a DVR.
11th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, Cádiz (España). 04 abril 2017
Fecha de publicación: abril 2017.
J. Roldán-Pérez, A. García-Cerrada, M. Ochoa, J. Zamora, A high-performance voltage sag detection algorithm for a dynamic voltage restorer, 11th IEEE International Conference on Compatibility, Power Electronics and Power Engineering - CPE-POWERENG 2017. ISBN: 9781509049646, Cádiz, España, 04-06 Abril 2017