On a high-level model for the architectural evaluation of an MPEG-ATM ASIC

E.A. Gilarranz, E. Jiménez, S. Alexandres, F. Moreno, J. Meneses

XIII Design of Circuits and Integrated Systems Conference (DCIS’98). pp 374-377. Universidad Carlos III, Madrid (Spain). 17-20 Noviembre 1998

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Publication date: November 1998.

Citation:
Gilarranz, E.A., Jiménez, E., Alexandres, S., Moreno, F., Meneses, J., On a high-level model for the architectural evaluation of an MPEG-ATM ASIC, XIII Design of Circuits and Integrated Systems Conference (DCIS’98). pp 374-377. Universidad Carlos III, Madrid (Spain). 17-20 November 1998.